Spiking neural networks
computing with events in time
An artificial neuron in a deep network outputs a number every time you evaluate it. A spiking neuron does almost nothing — it integrates its input and stays silent until it crosses a threshold, then emits a single spike and resets. Information lives in when the spikes happen, not in a continuous activation, and a chip built this way only burns energy when a spike actually arrives. This page builds the idea from the single neuron up to a trained network.
The core idea — integrate, fire, reset
The workhorse model is the leaky integrate-and-fire (LIF) neuron. Its membrane potential $V$ charges toward its input current and leaks back toward rest; when it reaches the threshold $V_{\text{th}}$ it emits a spike and snaps back to reset. That is the entire computation — a first-order differential equation and a comparator — and it is why a spiking neuron costs only tens of logic elements in hardware. The consequence that matters for energy is sparsity: between spikes the neuron does no work, so the power a network draws tracks how often it fires rather than a fixed clock.
$$\tau_m \frac{dV}{dt} = -\big(V - V_{\text{rest}}\big) + R\,I(t), \qquad V \ge V_{\text{th}} \;\Rightarrow\; \text{spike},\; V \leftarrow V_{\text{reset}}$$
Raise the current and the neuron fires faster; raise the time constant and it integrates more sluggishly. Below threshold there are no spikes and, on real hardware, no switching — that silence is the efficiency.
01 The neuron — one equation, many temperaments
LIF is the simplest useful spiking neuron, but a whole zoo trades biological realism for cost. Izhikevich adds a recovery variable and reproduces twenty-plus firing patterns from two equations; AdEx bolts exponential spike initiation and adaptation onto LIF; Hodgkin–Huxley models the actual sodium and potassium ion channels. SC-NeuroCore carries a large library of these — from one-line integrate-and-fire units to biophysical and discrete-map neurons.
$$\text{Izhikevich: } \frac{dv}{dt}=0.04v^2+5v+140-u+I, \quad \frac{du}{dt}=a(bv-u)$$
Deeper: choosing a model, and the refractory period
The choice is an accuracy–cost trade. LIF (≈ tens of look-up tables on an FPGA) is enough for most machine-learning workloads; Izhikevich is the cheapest way to get realistic bursting and chattering; AdEx captures spike-frequency adaptation that LIF cannot; Hodgkin–Huxley is the reference when you actually care about channel dynamics. All of them share the same skeleton — a state that integrates input, a threshold, a reset, and usually a short refractory period during which the neuron ignores input (which bounds the maximum firing rate, e.g. a 2 ms refractory caps a cell near 500 Hz). SC-NeuroCore validates each model against published source traces before it ships, so a model is not merely "an ODE that runs" but one that reproduces its reference dynamics.
02 Synapses & plasticity — learning from spike timing
Neurons connect through synapses whose weights can change with experience. The canonical rule is spike-timing-dependent plasticity (STDP): if a presynaptic spike arrives just before the postsynaptic neuron fires, the synapse strengthens; if it arrives just after, it weakens. Learning is local in time and needs no global error signal.
$$\Delta w = \begin{cases} +A_+\,e^{-\Delta t/\tau_+}, & \Delta t = t_{\text{post}}-t_{\text{pre}} > 0 \\[2pt] -A_-\,e^{\,\Delta t/\tau_-}, & \Delta t < 0 \end{cases}$$
Deeper: beyond pairwise STDP
Pairwise STDP is the starting point; real systems layer more on top. Short-term plasticity (STP) makes a synapse facilitate or depress over milliseconds as vesicles are released and depleted. Reward-modulated STDP (R-STDP) gates the weight change with an eligibility trace and a global reward, bridging to reinforcement learning. The BCM rule slides its own potentiation threshold to keep activity stable (metaplasticity). These rules are what let a spiking network adapt on-chip, without backpropagation — and they are exactly the mechanism exercised by the identity-substrate notebook, where injected experience measurably reshapes the recurrent weight matrix.
03 Event-driven computation — work only when something happens
A conventional accelerator does the same multiply-accumulates every clock cycle whether or not the data changed. An event-driven neuromorphic system does the opposite: a neuron updates only when it receives a spike, so the compute — and the power — scale with the number of spikes, not the clock. Spikes travel as address events: a bare (neuron id, timestamp) pair on a shared bus.
$$\text{energy} \;\propto\; \text{spike rate} \quad\text{(not clock rate)}, \qquad \text{compute} \;\propto\; \#\,\text{active neurons}$$
Deeper: sparsity, spike gating and AER
Because most neurons are silent most of the time, a simulator or a chip can skip idle units entirely — "spike gating" makes cost proportional to the active count rather than the population size, which is where the order-of-magnitude energy advantage over dense inference comes from. Communication uses Address-Event Representation (AER): rather than shipping a full activation vector, the fabric sends only the identities of the neurons that fired, when they fired. SC-NeuroCore's hardware path generates AER routers directly, and its co-simulation checks that the event stream from the Verilog matches the Python spike-for-spike.
04 Networks & dynamics — from one neuron to a cortex
Wire excitatory and inhibitory neurons together with realistic connectivity and the network develops its own dynamics. A well-tuned cortical circuit settles into the asynchronous-irregular state seen in the brain: every population fires at a low, characteristic rate, inhibition runs faster than excitation, and no external stimulus is needed to sustain it — background noise alone bootstraps it.
$$I_i(t) = \sum_j w_{ij}\!\!\sum_{t_j^{(f)}} \varepsilon\!\left(t - t_j^{(f)} - d_{ij}\right) + I^{\text{bg}}_i(t)$$
Deeper: the eight-population cortical microcircuit
The reference example is the Potjans & Diesmann (2014) microcircuit: eight populations (excitatory and inhibitory in each of cortical layers 2/3, 4, 5 and 6), wired with the published layer-resolved connectivity and driven only by background Poisson input. With per-connection Gaussian synaptic delays it reproduces the published layer-specific spontaneous rates within tolerance — the notebook on this site runs it and compares the measured rates to the published table honestly, deep layers and all. The same equations, being local and event-based, lower directly onto hardware.
05 Training — gradients through a spike
A spike is a step function, and a step has a derivative of zero almost everywhere and infinity at the threshold — backpropagation cannot flow through it. The fix is the surrogate gradient: run the true, hard spike on the forward pass, but pretend on the backward pass that the threshold was a smooth curve, so gradients pass. This lets ordinary deep-learning tooling train spiking networks directly.
$$\text{forward: } s=\Theta(V-V_{\text{th}}), \qquad \text{backward: } \frac{\partial s}{\partial V}\approx \sigma'(V-V_{\text{th}})$$
Deeper: surrogate gradients and ANN→SNN conversion
Common surrogates replace the Heaviside derivative with a fast sigmoid or an arctangent bump centred at the threshold; training then uses backpropagation-through-time over the unrolled membrane dynamics. The alternative route is ANN→SNN conversion: train a conventional ReLU network, then map activations to firing rates — simpler, but it needs longer spike windows for accuracy. In either case the trained weights are quantised to fixed-point, expanded to the on-chip representation, and shipped through the hardware pipeline, with every stage kept bit-true so the trained network is provably the deployed one.
From spikes to silicon
A LIF neuron is an integrator, a comparator and a reset — a few dozen look-up tables. A synapse is a weighted event. A network is those two primitives repeated. That economy is exactly why spiking networks lower so well onto FPGAs, and why the same model you train in Python can be proven, gate for gate, as the circuit you deploy.
Reference — neuron families at a glance
| Model | State variables | Captures | Relative cost |
|---|
| LIF | 1 (membrane) | integrate, fire, leak | lowest (~tens of LUTs) |
| Izhikevich | 2 (v, recovery) | 20+ firing patterns, bursting | low |
| AdEx | 2 (v, adaptation) | spike-frequency adaptation | low–medium |
| Hodgkin–Huxley | 4 (v + 3 gates) | ion-channel biophysics | highest |
| Resonate-and-fire | 2 (complex) | frequency selectivity | low |
Further reading. Maass, W. (1997) Networks of spiking neurons: the third generation of neural network models. Gerstner, W. & Kistler, W. (2002) Spiking Neuron Models. Izhikevich, E. M. (2003) Simple model of spiking neurons, IEEE TNN. Neftci, E. et al. (2019) Surrogate gradient learning in spiking neural networks, IEEE SPM. Potjans, T. C. & Diesmann, M. (2014), Cerebral Cortex 24(3):785–806. For the terminology, see the SC-NeuroCore glossary.
The demo above integrates a single LIF neuron in normalised units in your browser; it illustrates the integrate–fire–reset behaviour and is not the bit-true fixed-point datapath used for hardware generation.