An artificial neuron in a deep network outputs a number every time you evaluate it. A spiking neuron does almost nothing — it integrates its input and stays silent until it crosses a threshold, then emits a single spike and resets. Information lives in when the spikes happen, not in a continuous activation, and a chip built this way only burns energy when a spike actually arrives. This page builds the idea from the single neuron up to a trained network.
The workhorse model is the leaky integrate-and-fire (LIF) neuron. Its membrane potential $V$ charges toward its input current and leaks back toward rest; when it reaches the threshold $V_{\text{th}}$ it emits a spike and snaps back to reset. That is the entire computation — a first-order differential equation and a comparator — and it is why a spiking neuron costs only tens of logic elements in hardware. The consequence that matters for energy is sparsity: between spikes the neuron does no work, so the power a network draws tracks how often it fires rather than a fixed clock.
Raise the current and the neuron fires faster; raise the time constant and it integrates more sluggishly. Below threshold there are no spikes and, on real hardware, no switching — that silence is the efficiency.
LIF is the simplest useful spiking neuron, but a whole zoo trades biological realism for cost. Izhikevich adds a recovery variable and reproduces twenty-plus firing patterns from two equations; AdEx bolts exponential spike initiation and adaptation onto LIF; Hodgkin–Huxley models the actual sodium and potassium ion channels. SC-NeuroCore carries a large library of these — from one-line integrate-and-fire units to biophysical and discrete-map neurons.
Neurons connect through synapses whose weights can change with experience. The canonical rule is spike-timing-dependent plasticity (STDP): if a presynaptic spike arrives just before the postsynaptic neuron fires, the synapse strengthens; if it arrives just after, it weakens. Learning is local in time and needs no global error signal.
A conventional accelerator does the same multiply-accumulates every clock cycle whether or not the data changed. An event-driven neuromorphic system does the opposite: a neuron updates only when it receives a spike, so the compute — and the power — scale with the number of spikes, not the clock. Spikes travel as address events: a bare (neuron id, timestamp) pair on a shared bus.
Wire excitatory and inhibitory neurons together with realistic connectivity and the network develops its own dynamics. A well-tuned cortical circuit settles into the asynchronous-irregular state seen in the brain: every population fires at a low, characteristic rate, inhibition runs faster than excitation, and no external stimulus is needed to sustain it — background noise alone bootstraps it.
A spike is a step function, and a step has a derivative of zero almost everywhere and infinity at the threshold — backpropagation cannot flow through it. The fix is the surrogate gradient: run the true, hard spike on the forward pass, but pretend on the backward pass that the threshold was a smooth curve, so gradients pass. This lets ordinary deep-learning tooling train spiking networks directly.
A LIF neuron is an integrator, a comparator and a reset — a few dozen look-up tables. A synapse is a weighted event. A network is those two primitives repeated. That economy is exactly why spiking networks lower so well onto FPGAs, and why the same model you train in Python can be proven, gate for gate, as the circuit you deploy.
| Model | State variables | Captures | Relative cost |
|---|---|---|---|
| LIF | 1 (membrane) | integrate, fire, leak | lowest (~tens of LUTs) |
| Izhikevich | 2 (v, recovery) | 20+ firing patterns, bursting | low |
| AdEx | 2 (v, adaptation) | spike-frequency adaptation | low–medium |
| Hodgkin–Huxley | 4 (v + 3 gates) | ion-channel biophysics | highest |
| Resonate-and-fire | 2 (complex) | frequency selectivity | low |
Further reading. Maass, W. (1997) Networks of spiking neurons: the third generation of neural network models. Gerstner, W. & Kistler, W. (2002) Spiking Neuron Models. Izhikevich, E. M. (2003) Simple model of spiking neurons, IEEE TNN. Neftci, E. et al. (2019) Surrogate gradient learning in spiking neural networks, IEEE SPM. Potjans, T. C. & Diesmann, M. (2014), Cerebral Cortex 24(3):785–806. For the terminology, see the SC-NeuroCore glossary.
The demo above integrates a single LIF neuron in normalised units in your browser; it illustrates the integrate–fire–reset behaviour and is not the bit-true fixed-point datapath used for hardware generation.
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